TECHNICAL ARTICLES
Using and Sharing RAM Disks in LYNXOS-178
James Deutch | Principal Field Applications Engineer: Sep 18, 2023 9:00:00 AM
Based on several customers inquiries the purpose of this blog is to outline how to Allocate memory to a RAM disk Mount and unmount a RAM disk Create a shared read-only RAM disk between two subjects
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IMPORTANCE OF SYSTEM ARCHITECTURE AND PLATFORM CHOICE ON SAFETY CERTIFICATION
Tim Loveless | Principal Solutions Architect: May 12, 2023 10:15:14 AM
Not many companies have the expertise to build software to meet the DO-178C (Aviation), IEC61508 (Industrial), or ISO26262 (Automotive) safety standards. Yet the demand for safety-certified software is growing as software control is used in more...
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Introducing the Z-Application-Bridging the gap between bare metal and rtos
LYNX Software Technologies: Aug 12, 2021 12:06:18 PM
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Single Root I/O Virtualization (SR-IOV) -Pt 2- LynxOS-178 10G network benchmarkS
Tim Loveless | Principal Solutions Architect: Mar 16, 2021 12:33:11 PM
_______________ Single Root I/O Virtualization (SR-IOV) virtualizes network interface cards (NICs) to allow a single NIC to present itself as dozens of virtual NICs to a hypervisor. It is a hardware standard, part of the PCI-SIG (Peripheral...
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Who Needs a Hypervisor?
Tim Loveless | Principal Solutions Architect: Feb 25, 2021 12:59:58 PM
_______________ The standard benefits of a hypervisor are well known and often touted. Every RTOS has its hypervisor and they do genuinely help embedded designers to: Partition multicore processors into virtual machines; an elegant way to...
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Edge Computing is Here. What's Next?
Lynx Software Technologies: Feb 7, 2021 9:33:37 AM
_______________ Industry 4.0? Edge computing? Call it what you will, the fact remains that our industry moves slowly. Obstacles must be overcome before we can claim that edge computing has evolved from theories and experiments to true industrial...
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What is Cache Coloring and How Does it Work?
Tim Loveless | Principal Solutions Architect: Feb 5, 2021 11:52:40 AM
_______________ There are substantial challenges in building secure and safe systems on multicore processors (MCPs). Last level cache contention is undoubtedly the largest source of multicore interference, and a significant challenge for real-time...
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On reference architectures
LYNX Software Technologies: Jan 8, 2021 11:57:36 AM
What is a reference architecture? The term “architecture” seems to be in ever increasing use in its technological context. As an extrapolation from the construction term that Frank Lloyd Wright would have been familiar with, its definition as the...
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Intel’s first DO-254 hardware certification evidence – it’s on a MultiCore
Tim Loveless | Principal Solutions Architect: Dec 18, 2020 10:52:15 AM
WELL DONE, INTEL®! Over the years I’ve read lots of datasheets. They can sometimes be heavy on marketing buzzwords and prone to sweeping statements that oversell their solutions and gloss over gaps. I read this new Solution Brief from Intel and it...
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