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TECHNICAL ARTICLES

Adjusting System Functionality and Capabilities in LYNX MOSA.ic

I recently set up a demo to showcase how a customer can use subjects, also known as rooms, like containers. What I mean by that is that software engineers can build guest images and reload them on the fly into the subjects. This gives the ability to... Read More

Using and Sharing RAM Disks in LYNXOS-178

Based on several customers inquiries the purpose of this blog is to outline how to Allocate memory to a RAM disk Mount and unmount a RAM disk Create a shared read-only RAM disk between two subjects Read More

IMPORTANCE OF SYSTEM ARCHITECTURE AND PLATFORM CHOICE ON SAFETY CERTIFICATION

Not many companies have the expertise to build software to meet the DO-178C (Aviation), IEC61508 (Industrial), or ISO26262 (Automotive) safety standards. Yet the demand for safety-certified software is growing as software control is used in more... Read More

Introducing the Z-Application-Bridging the gap between bare metal and rtos

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Single Root I/O Virtualization (SR-IOV) -Pt 2- LynxOS-178 10G network benchmarkS

_______________ Single Root I/O Virtualization (SR-IOV) virtualizes network interface cards (NICs) to allow a single NIC to present itself as dozens of virtual NICs to a hypervisor. It is a hardware standard, part of the PCI-SIG (Peripheral... Read More

Who Needs a Hypervisor?

_______________ The standard benefits of a hypervisor are well known and often touted. Every RTOS has its hypervisor and they do genuinely help embedded designers to: Partition multicore processors into virtual machines; an elegant way to... Read More

Edge Computing is Here. What's Next?

_______________ Industry 4.0? Edge computing? Call it what you will, the fact remains that our industry moves slowly. Obstacles must be overcome before we can claim that edge computing has evolved from theories and experiments to true industrial... Read More

What is Cache Coloring and How Does it Work?

_______________ There are substantial challenges in building secure and safe systems on multicore processors (MCPs). Last level cache contention is undoubtedly the largest source of multicore interference, and a significant challenge for real-time... Read More

On reference architectures

What is a reference architecture? The term “architecture” seems to be in ever increasing use in its technological context. As an extrapolation from the construction term that Frank Lloyd Wright would have been familiar with, its definition as the... Read More

Intel’s first DO-254 hardware certification evidence – it’s on a MultiCore

WELL DONE, INTEL®! Over the years I’ve read lots of datasheets. They can sometimes be heavy on marketing buzzwords and prone to sweeping statements that oversell their solutions and gloss over gaps. I read this new Solution Brief from Intel and it... Read More